DECEMBER 2024
ANALOG AND DIGITAL ELECTRONICS
Time Allowed: 3 Hours Full Marks: 60
Answer to Question No. 1 of Group A must be written in the main answer script. In Question No. 1, out of 2 marks for each MCQ, 1 mark is allotted for right answer and 1 mark is allotted for correct explanation of the answer.
Answer any Five (05) Questions from Group-B.
GROUP-A
1. Choose the correct answer from the given alternatives and explain your answer (any ten): 2×10=20
i. For a full wave diode bridge rectifier, number of diodes used is:
- a) 1
- b) 2
- c) 3
- d) 4
Show Answer
Answer: d) 4
Explanation: A bridge rectifier uses four diodes arranged in a bridge so that two conduct during each half-cycle.
ii. Zener diode usually operates in ______ condition.
- a) Forward biased
- b) Reverse biased
- c) Unbiased
- d) Both a & b.
Show Answer
Answer: b) Reverse biased
Explanation: A Zener diode is normally operated in reverse bias in its breakdown region, where it maintains an approximately constant voltage.
iii. Function of filter in rectifier circuit is:-
- a) Increase ripple in output
- b) Decrease ripple in output
- c) Conversion of AC to DC
- d) Conversion of DC to AC
Show Answer
Answer: b) Decrease ripple in output
Explanation: A filter smooths the pulsating DC produced by a rectifier by reducing the AC ripple component in the output.
iv. With supply frequency “f”, ripple frequency of a full wave rectifier output is:-
- a) f/2
- b) 2f
- c) f/3
- d) f
Show Answer
Answer: b) 2f
Explanation: A full-wave rectifier produces two ripple pulses during each input cycle. Therefore, the ripple frequency is twice the supply frequency, 2f.
v. In Common –Emitter mode of BJT, input and output voltages phase relation is:
- a) output is in phase with input
- b) output is 180° out of phase with input
- c) output is 120° out of phase with input
- d) cannot be specified.
Show Answer
Answer: b) output is 180° out of phase with input
Explanation: A common-emitter amplifier produces an inversion. Hence, the output voltage is 180° out of phase with the input voltage.
vi. For sustained oscillation, which one is true according to Barkhausen criteria?
- a) |Aβ| > 1
- b) |Aβ| = 0
- c) |Aβ| = 1
- d) |Aβ| = infinite
Show Answer
Answer: c) |Aβ| = 1
Explanation: The Barkhausen magnitude condition for sustained oscillation is |Aβ| = 1, together with the required total loop phase shift of 0° or an integral multiple of 360°.
vii. How would you keep less distortion in the output of a BJT based amplifier?
- a) by keeping Q point near saturation region
- b) by keeping Q point near cut-off region
- c) by keeping Q point midway of load line
- d) by keeping Q point anywhere in the load line.
Show Answer
Answer: c) by keeping Q point midway of load line
Explanation: Keeping the Q-point near the midpoint of the DC load line allows approximately symmetrical signal swing before cutoff or saturation, reducing clipping distortion.
viii. Binary half adder has :-
- a) One input & two outputs
- b) Two inputs & one output
- c) Two inputs & two outputs
- d) One input & one output.
Show Answer
Answer: c) Two inputs & two outputs
Explanation: A half adder adds two one-bit binary inputs and produces two outputs: Sum and Carry.
ix. How many selection lines are required to construct 8:1 MUX?
- a) 1
- b) 2
- c) 3
- d) 4
Show Answer
Answer: c) 3
Explanation: An 8-to-1 multiplexer needs log₂(8) = 3 selection lines to select one of its eight inputs.
x. How many half adders are required to construct a binary full adder?
- a) 1
- b) 2
- c) 3
- d) 4
Show Answer
Answer: b) 2
Explanation: A full adder can be constructed using two half adders followed by an OR gate for combining their carry outputs.
xi. What is the parity of the binary number “00111010”?
- a) odd
- b) even
- c) both a & b
- d) cannot be determined.
Show Answer
Answer: b) even
Explanation: The binary number 00111010 contains four 1s. Since four is even, the parity is even.
xii. Forbidden condition occurs in S-R flip-flop when :-
- a) S= 0 & R= 0
- b) S= 0 & R= 1
- c) S=1 & R= 0
- d) S= 1 & R= 1
Show Answer
Answer: d) S= 1 & R= 1
Explanation: For the conventional NOR-gate S-R flip-flop, S = 1 and R = 1 drives both outputs low, violating the complementary output condition and producing the forbidden state.
xiii. Toggle condition occurs in J-K flip-flop when :-
- a) J = 0 & K= 0
- b) J = 0 & K= 1
- c) J= 1 & K= 0
- d) J = 1 & K= 1
Show Answer
Answer: d) J = 1 & K= 1
Explanation: When J and K are both 1, a JK flip-flop complements its previous state on the active clock edge; therefore it operates in toggle mode.
xiv. Maximum input clock frequency that can be used in a 4 bit binary ripple counter with propagation delay of 40ns for each flip-flop is
- a) 6.25 Hz
- b) 6.25 kHz
- c) 6.25 MHz
- d) 6.25 GHz
Show Answer
Answer: c) 6.25 MHz
Explanation: For a 4-bit ripple counter, the total propagation delay is 4 × 40 ns = 160 ns. Thus the maximum clock frequency is approximately 1/160 ns = 6.25 MHz.
xv. Highest input signal frequency that can be correctly processed by a A/D converter operating at sampling rate of 2 KHz is:-
- a) 1 kHz
- b) 2 kHz
- c) 3 kHz
- d) 4 kHz
Show Answer
Answer: a) 1 kHz
Explanation: According to the Nyquist sampling theorem, the highest frequency that can be correctly sampled is less than half the sampling frequency. For 2 kHz sampling, the Nyquist frequency is 1 kHz.
GROUP-B
Answer any Five (05) questions.
2. (a) Draw V-I characteristics of a Zener Diode with proper markings. (b) Define dynamic resistance. (c) Define avalanche breakdown and Zener breakdown. (3+2+3)
3. (a) Explain working principle of full wave diode bridge rectifier with necessary circuit diagram and waveforms. (b) Define Average output voltage and form factor for full wave rectifier. (5+3)
4. (a) Compare between CB, CE and CC configurations of BJT. (b) Define DC Load line and Q-point in a CE transistor amplifier with relevant diagrams. (c) What is the relation between “α” & “β” in BJT? (3+4+1)
5. (a) Define positive and negative feedback system. (b) Derive output gain expression for a negative feedback system with relevant diagram. (c) Explain Barkhausen criteria for sustained oscillation. (2+3+3)
6. (a) Explain Binary full adder with truth table and derive final expression of Sum & Carry. (b) How can we construct Binary full adder using binary half adder? (6+2)
7. (a) Explain principle of operation of J-K flip flop with circuit diagram, truth table and output expression. (b) Define Edge triggering. (6+2)
8. (a) Explain principle of operation of multiplexer with relevant diagram, truth table and output expression. (b) What are preset and clear signals in flip flops? (6+2)
9. (a) Explain principle of operation of Dual slope type A/D converter with relevant diagrams. (b) Explain sampling theorem for A/D converter. (6+2)
10. (a) Explain principle of operation of 4 bit binary asynchronous counter with logic diagram, truth table. (b) What is propagation delay in logic circuits? (7+1)